From: Simon Glass <simon.glass@canonical.com> The x86_64 global data pointer currently relies on a writable global_data_ptr variable in the .data section, which needs RAM to be available before relocation. Use MSR_FS_BASE to hold the address of gd->arch.gd_addr instead, mirroring how 32-bit x86 uses the FS segment descriptor base. Remove the global_data_ptr variable from misc.c and update arch_setup_gd() to call set_gd(). Separate the EFI_APP and X86_64 cases in global_data.h so each has its own set_gd() implementation. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- arch/x86/cpu/x86_64/misc.c | 12 ++---------- arch/x86/include/asm/global_data.h | 26 ++++++++++++++++++++++++-- 2 files changed, 26 insertions(+), 12 deletions(-) diff --git a/arch/x86/cpu/x86_64/misc.c b/arch/x86/cpu/x86_64/misc.c index fc449ca4ed6..cb953a92eee 100644 --- a/arch/x86/cpu/x86_64/misc.c +++ b/arch/x86/cpu/x86_64/misc.c @@ -5,21 +5,13 @@ */ #include <init.h> +#include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; -/* - * Global declaration of gd. - * - * As we write to it before relocation we have to make sure it is not put into - * a .bss section which may overlap a .rela section. Initialization forces it - * into a .data section which cannot overlap any .rela section. - */ -struct global_data *global_data_ptr = (struct global_data *)~0; - void arch_setup_gd(gd_t *new_gd) { - global_data_ptr = new_gd; + set_gd(new_gd); } int misc_init_r(void) diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 0d9fa823121..1b614067f76 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -10,6 +10,7 @@ #ifndef __ASSEMBLY__ #include <linux/types.h> +#include <asm/msr-index.h> #include <asm/processor.h> #include <asm/mrccache.h> #include <asm/u-boot.h> @@ -137,9 +138,8 @@ struct arch_global_data { #include <asm-generic/global_data.h> #ifndef __ASSEMBLY__ -# if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64) +# if defined(CONFIG_EFI_APP) -/* TODO(sjg@chromium.org): Consider using a fixed register for gd on x86_64 */ #define gd global_data_ptr static inline void set_gd(volatile gd_t *gd_ptr) @@ -166,6 +166,28 @@ static inline notrace gd_t *get_fs_gd_ptr(void) #define gd get_fs_gd_ptr() +#if CONFIG_IS_ENABLED(X86_64) +/* + * On x86_64, use MSR_FS_BASE to hold the address of gd->arch.gd_addr, mirroring + * how 32-bit x86 uses the FS segment descriptor base. This avoids the need for + * a writable global_data_ptr variable, which would require the .data section to + * be in RAM before relocation. + */ +static inline void set_gd(volatile gd_t *gd_ptr) +{ + gd_t *p = (gd_t *)gd_ptr; + unsigned long addr; + + p->arch.gd_addr = p; + addr = (unsigned long)&p->arch.gd_addr; + asm volatile("wrmsr" : : + "c" (MSR_FS_BASE), + "a" ((unsigned int)addr), + "d" ((unsigned int)(addr >> 32)) + : "memory"); +} +#endif + #define DECLARE_GLOBAL_DATA_PTR # endif -- 2.43.0

From: Simon Glass <simon.glass@canonical.com> The rules for extracting u-boot-x86-start16.bin and u-boot-x86-reset16.bin are x86-specific but live in the top-level Makefile. Move them to arch/x86/Makefile where they belong, dropping the outer ifdef CONFIG_X86 guard since that file is only included for x86 builds. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- Makefile | 10 ---------- arch/x86/Makefile | 8 ++++++++ 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/Makefile b/Makefile index f9a24cf21a0..ee5b54c4c51 100644 --- a/Makefile +++ b/Makefile @@ -1694,16 +1694,6 @@ quiet_cmd_ldr = LD $@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ $(filter-out FORCE,$^) -o $@ -ifdef CONFIG_X86 -OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16 -u-boot-x86-start16.bin: u-boot FORCE - $(call if_changed,objcopy) - -OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec -u-boot-x86-reset16.bin: u-boot FORCE - $(call if_changed,objcopy) - -endif # CONFIG_X86 OBJCOPYFLAGS_u-boot-app.efi := $(OBJCOPYFLAGS_EFI) u-boot-app.efi: u-boot dts/dt.dtb FORCE diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 7dc3171cebf..07e8df15afb 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -25,3 +25,11 @@ head-$(CONFIG_$(PHASE_)X86_16BIT_INIT) += arch/x86/cpu/resetvec.o libs-y += arch/x86/cpu/ libs-y += arch/x86/lib/ + +OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16 +u-boot-x86-start16.bin: u-boot FORCE + $(call if_changed,objcopy) + +OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec +u-boot-x86-reset16.bin: u-boot FORCE + $(call if_changed,objcopy) -- 2.43.0

From: Simon Glass <simon.glass@canonical.com> The 64-bit PIE linker cannot handle 16-bit relocations, so start16.o and resetvec.o cannot be linked into the 64-bit u-boot binary. Override the assembler flags to build these objects as 32-bit (elf_i386) when targeting x86_64, and exclude them from head-y since they are handled separately by binman. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- arch/x86/Makefile | 2 ++ arch/x86/cpu/Makefile | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 07e8df15afb..8abedd6e5e9 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -20,8 +20,10 @@ endif endif endif # EFI +ifndef CONFIG_$(PHASE_)X86_64 head-$(CONFIG_$(PHASE_)X86_16BIT_INIT) += arch/x86/cpu/start16.o head-$(CONFIG_$(PHASE_)X86_16BIT_INIT) += arch/x86/cpu/resetvec.o +endif libs-y += arch/x86/cpu/ libs-y += arch/x86/lib/ diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 82ae65f141a..71feca3bf29 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -26,6 +26,17 @@ endif extra-$(CONFIG_$(PHASE_)X86_16BIT_INIT) += resetvec.o start16.o +ifdef CONFIG_$(PHASE_)X86_64 +# The 16-bit startup code must be assembled as 32-bit since the 64-bit +# linker cannot handle 16-bit relocations in a PIE binary. These +# objects are not linked into the 64-bit u-boot; instead their sections +# are extracted to binary files for binman to place. +AFLAGS_REMOVE_start16.o := -march=core2 -m64 +AFLAGS_start16.o := -march=i386 -m32 +AFLAGS_REMOVE_resetvec.o := -march=core2 -m64 +AFLAGS_resetvec.o := -march=i386 -m32 +endif + obj-y += cpu.o ifndef CONFIG_TPL_BUILD obj-y += cpu_x86.o -- 2.43.0

From: Simon Glass <simon.glass@canonical.com> Add start_from_32.S which provides a complete startup path from the 16-bit reset vector through to 64-bit board_init_f(). The entry point is .code32, called from start16.S after the 16-to-32-bit transition. It builds identity-mapped page tables with 2MB pages, enables PAE and SSE, then transitions to long mode. The 32-bit section uses position-independent code (call/pop for the instruction pointer) because the 64-bit binary is linked as PIE. The far jump to 64-bit mode uses lret rather than ljmp to avoid PIE-incompatible relocations. The boot GDT is copied from ROM to RAM before use because KVM cannot perform the implicit GDT data read from the ROM region during the far jump that loads the 64-bit CS descriptor. Update the Makefile and Kconfig to select start_from_32.o when X86_64 and X86_16BIT_INIT are both enabled, and skip the ucode-ptr binman entry for x86_64 non-SPL builds. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- arch/x86/Kconfig | 8 +- arch/x86/Makefile | 4 + arch/x86/cpu/Makefile | 4 + arch/x86/cpu/start_from_32.S | 248 +++++++++++++++++++++++++++++ arch/x86/dts/emulation-u-boot.dtsi | 2 +- 5 files changed, 262 insertions(+), 4 deletions(-) create mode 100644 arch/x86/cpu/start_from_32.S diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index db3f16a7222..4fdfe5b90fe 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -44,9 +44,11 @@ config X86_RUN_64BIT_NO_SPL bool "64-bit" select X86_64 help - Build U-Boot as a 64-bit binary without SPL. As U-Boot enters - in 64-bit mode, the assumption is that the silicon is fully - initialized (MP, page tables, etc.). + Build U-Boot as a single 64-bit binary without SPL. If the + board selects X86_RESET_VECTOR, the binary includes 16-bit + and 32-bit startup code that transitions to 64-bit mode + before running any C code. Otherwise U-Boot enters directly + in 64-bit mode (e.g. when launched from coreboot). endchoice diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 955a728e361..e8813aa7e28 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -2,7 +2,11 @@ ifeq ($(CONFIG_EFI_APP),) ifdef CONFIG_$(PHASE_)X86_64 +ifeq ($(CONFIG_$(PHASE_)X86_16BIT_INIT),y) +head-y := arch/x86/cpu/start_from_32.o +else head-y := arch/x86/cpu/start64.o +endif else ifeq ($(CONFIG_$(PHASE_)X86_16BIT_INIT),y) head-y := arch/x86/cpu/start.o diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 71feca3bf29..210290364fb 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -7,7 +7,11 @@ # Daniel Engström, Omicron Ceti AB, daniel@omicron.se. ifeq ($(CONFIG_$(PHASE_)X86_64),y) +ifeq ($(CONFIG_$(PHASE_)X86_16BIT_INIT),y) +extra-y = start_from_32.o +else extra-y = start64.o +endif else ifeq ($(CONFIG_$(PHASE_)X86_16BIT_INIT),y) extra-y = start.o diff --git a/arch/x86/cpu/start_from_32.S b/arch/x86/cpu/start_from_32.S new file mode 100644 index 00000000000..197e4398cdb --- /dev/null +++ b/arch/x86/cpu/start_from_32.S @@ -0,0 +1,248 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * 64-bit x86 Startup Code with integrated 32-bit init + * + * Entry point _start is .code32, called from start16.S after the + * 16-to-32-bit transition. This sets up an identity-mapped page table + * and transitions to 64-bit mode before calling into the normal + * board_init_f() flow. + * + * The 32-bit section uses position-independent code (call/pop for the + * instruction pointer) because the 64-bit binary is linked as PIE. + * + * Copyright 2026 Canonical Ltd + * Written by Simon Glass <simon.glass@canonical.com> + */ + +#include <config.h> +#include <asm/msr-index.h> +#include <asm/processor.h> +#include <asm/processor-flags.h> + +/* + * Page-table base address - must be 4KB aligned and below 4GB. + * Uses 24KB total: PML4 (4KB) + PDPT (4KB) + 4 PD tables (4KB each) + */ +#define PT_BASE 0x80000 + +/* ------------------------------------------------------------------ */ + +.section .text.start +.code32 +.globl _start +.type _start, @function +_start: + /* Load the segment registers to match the GDT loaded in start16.S */ + movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax + movl %eax, %ds + movl %eax, %es + movl %eax, %gs + movl %eax, %ss + + /* Set up the stack in the CAR/SRAM region */ + movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp + + /* Clear IDT */ + subl $8, %esp + movl $0, 4(%esp) /* base = 0 */ + movw $0, 2(%esp) /* padding */ + movw $0, (%esp) /* limit = 0 */ + lidt (%esp) + addl $8, %esp + + /* + * Get our runtime address into %ebx so we can reference data + * position-independently (the 64-bit binary is linked as PIE) + */ + call 2f +2: popl %ebx + + /* + * Copy the boot GDT from ROM to RAM and load it from there. + * KVM's EPT may not allow data reads from the ROM region, so + * the GDT must be in RAM for the far jump to read the 64-bit + * CS descriptor. + */ +#define GDT_RAM 0x2000 + leal (boot_gdt - 2b)(%ebx), %esi + movl $GDT_RAM, %edi + movl $((boot_gdt_end - boot_gdt) / 4), %ecx + cld + rep movsl + + subl $8, %esp + movl $GDT_RAM, 2(%esp) /* base in RAM */ + movw $(boot_gdt_end - boot_gdt - 1), (%esp) /* limit */ + lgdt (%esp) + addl $8, %esp + + /* + * Build identity-mapped page tables at PT_BASE (maps 4GB with + * 2MB pages). This is similar to build_pagetable() in + * arch/x86/cpu/i386/cpu.c (which also sets the US/A/DT bits) + * but must be done in assembly because page tables are needed + * to enter 64-bit mode and all C code in this build is compiled + * for 64-bit. + * + * Layout (24KB total): + * PT_BASE + 0x0000 PML4 (512 entries, only [0] used) + * PT_BASE + 0x1000 PDPT (512 entries, [0]..[3] used) + * PT_BASE + 0x2000 PD for 0-1GB (512 * 2MB entries) + * PT_BASE + 0x3000 PD for 1-2GB + * PT_BASE + 0x4000 PD for 2-3GB + * PT_BASE + 0x5000 PD for 3-4GB + */ + + /* Zero 24KB */ + movl $PT_BASE, %edi + xorl %eax, %eax + movl $(6 * 4096 / 4), %ecx + rep stosl + + /* PML4[0] -> PDPT */ + movl $(PT_BASE + 0x1000 + 0x03), %eax /* Present + RW */ + movl %eax, PT_BASE + + /* PDPT[0..3] -> four PD tables */ + movl $(PT_BASE + 0x2000 + 0x03), %eax + movl %eax, (PT_BASE + 0x1000 + 0 * 8) + addl $0x1000, %eax + movl %eax, (PT_BASE + 0x1000 + 1 * 8) + addl $0x1000, %eax + movl %eax, (PT_BASE + 0x1000 + 2 * 8) + addl $0x1000, %eax + movl %eax, (PT_BASE + 0x1000 + 3 * 8) + + /* + * Fill the four PD tables (2048 entries total). + * Each entry maps a 2MB page: address | PS(bit7) | RW | P + */ + movl $(PT_BASE + 0x2000), %edi + movl $0x00000083, %eax /* 0MB, PS + RW + P */ + movl $2048, %ecx +1: + movl %eax, (%edi) + movl $0, 4(%edi) /* high 32 bits = 0 */ + addl $0x200000, %eax /* next 2MB page */ + addl $8, %edi + decl %ecx + jnz 1b + + /* + * Transition to 64-bit long mode. This is similar to + * cpu_call64() in arch/x86/cpu/i386/call64.S but uses lret + * instead of ljmp (which would emit a PIE-incompatible + * relocation). It also enables SSE which call64.S does not + * need to do. + */ + + /* Disable paging (should already be off after reset) */ + movl %cr0, %eax + andl $~X86_CR0_PG, %eax + movl %eax, %cr0 + + /* Enable PAE and SSE (x86_64 gcc assumes SSE2 is available) */ + movl %cr4, %eax + orl $(X86_CR4_PAE | X86_CR4_OSFXSR), %eax + movl %eax, %cr4 + + /* Clear CR0.EM so SSE instructions do not fault */ + movl %cr0, %eax + andl $~X86_CR0_EM, %eax + movl %eax, %cr0 + + /* Point CR3 at PML4 */ + movl $PT_BASE, %eax + movl %eax, %cr3 + + /* Enable Long Mode in EFER */ + movl $MSR_EFER, %ecx + rdmsr + btsl $_EFER_LME, %eax + wrmsr + + /* Enable paging -> activates long mode */ + movl %cr0, %eax + orl $X86_CR0_PG, %eax + movl %eax, %cr0 + + /* + * Jump to 64-bit code segment. Use lret to avoid the + * PIE-incompatible relocation that a direct ljmp would emit. + */ + leal (start64 - 2b)(%ebx), %eax + pushl $(X86_GDT_ENTRY_64BIT_CS * X86_GDT_ENTRY_SIZE) + pushl %eax + lret + +/* ------------------------------------------------------------------ */ +.code64 +start64: + /* Set up memory using the existing stack */ + mov %rsp, %rdi + call board_init_f_alloc_reserve + mov %rax, %rsp + + call board_init_f_init_reserve + + xor %rdi, %rdi + call board_init_f + call board_init_f_r + + /* Should not return here */ + jmp . + +.globl board_init_f_r_trampoline64 +.type board_init_f_r_trampoline64, @function +board_init_f_r_trampoline64: + /* + * SDRAM has been initialised, U-Boot code has been copied into + * RAM, BSS has been cleared and relocation adjustments have been + * made. It is now time to jump into the in-RAM copy of U-Boot + * + * %rsi = Address of top of new stack + * %rdi = New gd + */ + + /* Stack grows down from top of SDRAM */ + movq %rsi, %rsp + + /* Re-enter U-Boot by calling board_init_f_r() */ + call board_init_f_r + +/* ------------------------------------------------------------------ */ +/* Data */ +/* ------------------------------------------------------------------ */ + +/* + * Boot GDT - includes valid 32-bit CS/DS entries (matching start16.S's + * selectors 0x10 and 0x18) plus the 64-bit CS at entry 9 (selector + * 0x48, matching U-Boot's standard GDT numbering). + * + * This is copied to RAM before use because KVM cannot perform the + * implicit GDT data read from the ROM region during the far jump + * to 64-bit mode. + * + * When arch_setup_gd() later loads the real GDT the CS selector (0x48) + * remains valid. + */ +.align 16 +boot_gdt: + /* Entry 0: NULL */ + .quad 0 + /* Entry 1: unused (matches start16.S layout) */ + .quad 0 + /* Entry 2: 32-bit code segment (selector 0x10) */ + .quad 0x00cf9b000000ffff + /* Entry 3: 32-bit data segment (selector 0x18) */ + .quad 0x00cf93000000ffff + /* Entries 4-8: unused */ + .fill 5, 8, 0 + + /* Entry 9: 64-bit code segment (selector 0x48) */ + .quad 0x00af9a000000ffff + + /* Entry 10-11: unused (keep GDT same size as real one) */ + .quad 0 + .quad 0 +boot_gdt_end: diff --git a/arch/x86/dts/emulation-u-boot.dtsi b/arch/x86/dts/emulation-u-boot.dtsi index 7245fe51b3b..64d61b207da 100644 --- a/arch/x86/dts/emulation-u-boot.dtsi +++ b/arch/x86/dts/emulation-u-boot.dtsi @@ -12,7 +12,7 @@ u-boot-spl-with-ucode-ptr { optional-ucode; }; -#else +#elif !defined(CONFIG_X86_64) u-boot-with-ucode-ptr { optional-ucode; }; -- 2.43.0

From: Simon Glass <simon.glass@canonical.com> The x86_64 no-SPL build does not programme MTRRs because gd->arch.has_mtrr is never set to true. In the SPL-based flow, SPL sets up the MTRRs during its init and they persist into U-Boot proper. Without SPL, nothing sets them up. Set has_mtrr in x86_cpu_init_f() for x86_64, and extend the arch_cpu_init() guard in the QEMU board code to also cover X86_16BIT_INIT so that it is called in the no-SPL path. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- arch/x86/cpu/qemu/qemu.c | 4 +++- arch/x86/cpu/x86_64/cpu.c | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index b393205acb3..87e61558e8d 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -108,14 +108,16 @@ void qemu_chipset_init(void) } } -#if CONFIG_IS_ENABLED(X86_32BIT_INIT) +#if CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_IS_ENABLED(X86_16BIT_INIT) int arch_cpu_init(void) { post_code(POST_CPU_INIT); return x86_cpu_init_f(); } +#endif +#if CONFIG_IS_ENABLED(X86_32BIT_INIT) int checkcpu(void) { return 0; diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 25ae92c702f..610155d893c 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -61,6 +61,8 @@ int x86_cpu_reinit_f(void) int x86_cpu_init_f(void) { + gd->arch.has_mtrr = true; + return 0; } -- 2.43.0

From: Simon Glass <simon.glass@canonical.com> Add CI entries for the new qemu-x86_64_nospl board in both GitLab and Azure pipelines, along with the corresponding test hook configuration files. The test configuration is identical to qemu-x86_64 since both use the same QEMU binary and u-boot.rom BIOS file. Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Simon Glass <simon.glass@canonical.com> --- .azure-pipelines.yml | 3 ++ .gitlab-ci.yml | 6 ++++ .../bin/travis-ci/conf.qemu-x86_64_nospl_na | 30 +++++++++++++++++++ .../u_boot_boardenv_qemu_x86_64_nospl_na.py | 14 +++++++++ 4 files changed, 53 insertions(+) create mode 100644 test/hooks/bin/travis-ci/conf.qemu-x86_64_nospl_na create mode 100644 test/hooks/py/travis-ci/u_boot_boardenv_qemu_x86_64_nospl_na.py diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 2b04cf205c9..5759a78a14b 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -486,6 +486,9 @@ stages: qemu_x86_64: TEST_PY_BD: "qemu-x86_64" TEST_PY_TEST_SPEC: "not sleep" + qemu_x86_64_nospl: + TEST_PY_BD: "qemu-x86_64_nospl" + TEST_PY_TEST_SPEC: "not sleep" qemu_xtensa_dc233c: TEST_PY_BD: "qemu-xtensa-dc233c" TEST_PY_TEST_SPEC: "not sleep and not efi" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 509a2956ecb..0b6ca99a8ba 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -664,6 +664,12 @@ qemu-x86_64 test.py: TEST_PY_TEST_SPEC: "not sleep" <<: *buildman_and_testpy_dfn +qemu-x86_64_nospl test.py: + variables: + TEST_PY_BD: "qemu-x86_64_nospl" + TEST_PY_TEST_SPEC: "not sleep" + <<: *buildman_and_testpy_dfn + qemu-xtensa-dc233c test.py: variables: TEST_PY_BD: "qemu-xtensa-dc233c" diff --git a/test/hooks/bin/travis-ci/conf.qemu-x86_64_nospl_na b/test/hooks/bin/travis-ci/conf.qemu-x86_64_nospl_na new file mode 100644 index 00000000000..f6a1b5e65a7 --- /dev/null +++ b/test/hooks/bin/travis-ci/conf.qemu-x86_64_nospl_na @@ -0,0 +1,30 @@ +# Copyright (c) 2016 Konsulko Group. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +console_impl=qemu +qemu_machine="pc" +qemu_binary="qemu-system-x86_64" +qemu_extra_args="-nographic -cpu qemu64 -netdev user,id=net0,tftp=${UBOOT_TRAVIS_BUILD_DIR} -device e1000,netdev=net0 " +qemu_extra_args+=" -object rng-random,filename=/dev/random,id=rng0" +qemu_extra_args+=" -device virtio-rng-pci,rng=rng0,max-bytes=1024,period=1000" + +qemu_kernel_args="-bios ${U_BOOT_BUILD_DIR}/u-boot.rom" +reset_impl=none +flash_impl=none diff --git a/test/hooks/py/travis-ci/u_boot_boardenv_qemu_x86_64_nospl_na.py b/test/hooks/py/travis-ci/u_boot_boardenv_qemu_x86_64_nospl_na.py new file mode 100644 index 00000000000..b1541596630 --- /dev/null +++ b/test/hooks/py/travis-ci/u_boot_boardenv_qemu_x86_64_nospl_na.py @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ + +import os +import travis_tftp + +env__net_uses_pci = True +env__net_dhcp_server = True +env__net_tftp_readable_file = travis_tftp.file2env('u-boot') +env__efi_loader_helloworld_file = travis_tftp.file2env('lib/efi_loader/helloworld.efi') +env__efi_loader_check_smbios = True +env__efi_loader_grub_file = travis_tftp.file2env('grub_x64.efi') +env__efi_fit_tftp_file = { + "dn" : os.environ['UBOOT_TRAVIS_BUILD_DIR'], +} -- 2.43.0